搜索资源列表
lroberts_Project_Final_Report
- verilog code of my final project that is slot machine game.
Verilog-state-machine
- 状态机采用 VerilogHDL 语言编码，建议分为三个 always 段，本文档就是详述其原因-VerilogHDL language code using the state machine, the proposed section is divided into three always
State-machine
- 实现了一个简单状态机的转换功能，用Verilog语言。-State machine implements a simple conversion function, with the Verilog language.
adc
- 设计ADC控制器，Verilog代码.利用有限状态机设计方法在FPGA上设计ADC0809的接口控制器，采样结果送到数码管显示出来。-ADC controller design, Verilog code using finite state machine design in the FPGA design ADC0809 interface controller, the sampling results to the digital display.
state-machine
- the two pdf describe the state maceine designing with VHDL or Verilog! The examples are very good with your work!
how-to-use-state-machine
- 三段式状态机的用法，对于想学习verilog及VHDL编程的人来说是必看的内容-The use of three-state machine, for those who want to learn verilog and VHDL programming is a must-see content people
state-machine-design
- Verilog and VHDL状态机设计，内含源代码，希望对大家有所帮助。-Verilog and VHDL state machine design, including source code, we want to help.
verilogClassicSamples
- verilog常用程序及其仿真结果整理，包括LCD，LED，AD采集，URAT，电子琴，电梯控制，自动售货机控制，出租车计价器，电子时钟，频率计，MPSK调制与解调-verilog common finishing process and its simulation results, including LCD, LED, AD collection, URAT, keyboard, elevator control, vending machine control, taxi meter,
How-to-write-by-verilog
- 如何写好状态机，用verilog。状态机很方便。-How to write a state machine, with verilog. State machine is very convenient.
Verilog-uart
- Verilog状态机实现的串口串口收发模块 -Verilog state machine for uart
verilog-course-design
- 两个关于Verilog语言学习的课程设计，有要求、思路和代码，一个是芯片接口设计，一个是智能烧烤机设计-Two on the Verilog language learning course design, requirements, ideas and code, a chip interface design, a smart barbecue machine design
Verilog
- 基于verilog的设计，本册设计是全自动洗衣机的设计，有六种不同的功能-Based on the design of vhgdl, this book design is the design of the automatic washing machine, there are six different functions
verilog-state-machine
- 使用VerilogHDL语言的小教程。 用三段式方法编写状态机。 有清晰详细的注释。-A small tutorial teaching how to write the state machine using three-step method in VerilogHDL language. There are clear and detailed notes in the tutorial.
Verilog
- 设计一个自动售货机，此机能出售1元、2元、5元、10元的四种商品。用于modelsim verilog 语言的编写-To design a vending machine, this function is the sale of 1 yuan, 2 yuan, 5 yuan, 10 yuan of the four commodities. The sale of what kind of goods to the customer pressing a button and digital
state-machine-program
- Verilog三段式状态机.pdf Verilog时序电路及状态机设计.ppt Verilog有限状态机设计.ppt 状态机.ppt 用状态机原理进行软件设计.pdf 有限状态机.pdf 有限状态机.ppt 状态机原理及用法.pdf 对状态机初学者有帮助。 -Verilog three-state machine the pdf Verilog Sequential Circuits and the state machine design. Ppt Veri
Finite-state-machine
- 用Verilog语言编写带有特定序列的检测功能-Verilog language with a specific sequence detection function
spislave_latest.tar
- SPI接口的verilog代码，本代码是从机代码。-SPI interface verilog code, the code is slave machine code.
AD0804
- AD0804的控制程序，有VHDL和verilog两个方式。还有AD0804的介绍，和状态机控制-AD0804 control program, there are two ways to VHDL and verilog. There AD0804 introduction, and the state machine control
a-simple-state-machine
- 简易状态机 verilog实现的简单状态机，全工程不错的 典型历程 值得学习入门很好的实验例程-Simple state machine verilog achieve a simple state machine, the typical course of the whole works good deserves learning entry good experimental routines
drink-machine
- Verilog codes for drink machine design project codes